decoding circuit造句
例句与造句
- The parallel form of the input sequence is decoded by means of a logical decoding circuit .
此并行形式序列通过逻辑解码电路输入。 - An application of logic devices able to program to the decoding circuit
可编程逻辑器件在译码电路中的应用 - Colour decoding circuit
彩色解码电路 - The results of p & r demonstrate that this design constructs a rs encoding / decoding circuit with a 3 . 2k internal fifo cache embedded , at the scale of 46k gates . its encoding and decoding speed are 66mhz and 47mhz respectively
布局布线后结果表明本文所设计的rs编码器的速度可达到66mhz ；解码速度可达到47mhz ，电路规模为4 . 6万门，包含有3 . 2k的内部缓存fifo的rs编/解码电路。 - The hardware system includes power supply circuit , clock reset circuit , jtag model building circuit , decoding circuit , memory interface circuit , man - machine interface circuit and numeric control constant - current source interface circuit
硬件系统主要包括电源电路、时钟复位电路、 jtag仿真接口电路，译码电路、存储器接口电路、人机接口电路、 adc转换电路和数控恒流源接口等。 - It's difficult to find decoding circuit in a sentence. 用decoding circuit造句挺难的
- Chapter two addresses in details systematic design and related modules of stand - alone door - lock system . the modules include mcu , recognition module , power , lcd , guide voice , i / o decoding circuit , rtc , unlock circuit , power save and anti - interference design
第二部分着重介绍了指纹门禁单机系统的系统总体设计以及系统中涉及到的各模块的基础知识、设计思路和具体实现。 - In this paper we discuss mca circuit , the sequential logic for mca data collection , for the setting of the uld , lld and the gain of pga , as well as the combinational logic for decoding circuits of the computer interface , based on cpld
本文详细论述了利用cpld实现的脉冲幅度多道电路及其数据采集的时序控制逻辑、阈值设定和程控放大倍数设定的时序控制逻四川大学硕士学位论文辑、以及与计算机接口的译码电路等组合控制逻辑。 - The application of hardware decoding circuit is widely , because it not only can be used on computer , but also can be used on consumer equipment like digital - tv and dvd - player . the avs and h . 264 standards and the architecture of digital video decoder chip are investigated in the thesis , and a high - definition multi - mode decoder soc chip is proposed . the chip can support avs level 4 . 0 / 6 . 0 and h . 264 main profile level 4 . 0
本文在研究了avs和h . 264视频编码标准和数字视频解码芯片系统结构的基础上,设计了同时支持avs和h . 264的高清解码soc芯片,能够对avslevel4 . 0 / 6 . 0和h . 264mainprofilelevel4 . 0的高清晰度视频码流实时解码。 - It emphatically describes address decoding circuit and controling circuit of fpga in hardware , and describes dma transmission mode and disposing of the interrupt in driver , and describes how to get data from wav file , and how to organize data before transmition , and how to chose appropriate quantity of data transmition every time in application
着重阐述了硬件设计中fpga内部重要的译码及控制电路设计,驱动程序中dma ( directmemoryaccess )的传输及中断处理,应用程序中对于两个声音文件数据的正确获取、组合及分割等问题。 - There are several aspects of work that was done in this thesis mainly . firstly , the theory of the under - water long - range remote control system was analyzed and the remote control instruction code was designed . secondly , decoding circuit of the under - water long - range remote control system was designed with fpga , including vhdl coding , simulation , synthesis , place & route , etc . besides , power consumption to fpga that is designed is estimated in this thesis . lastly , we designed and made one pcb to verify and test fpga decoding chip that is designed , and debugged and tested it finally
首先，深入研究和分析了在频域实现水下远程遥控解码的原理并进行了遥控指令编码设计；其次，用altera公司的cyclone系列fpga芯片完成了水下远程遥控fpga解码芯片的设计工作，包括硬件描述语言( vhdl )编码、电路前后仿真、综合和布局布线工作，并对设计的fpga解码芯片进行了初步的功耗估算；最后设计制作了一块fpga解码芯片电路验证测试板，并完成了电路调试和测试。 - On the basis of analyzing the old system and theory , the element circuits of wireless digital audio transceiver modules are designed in detail including the digital audio encoding and decoding circuits with the surrounding circuits , the fsk circuit based on pll frequency synthesizer , the power amplifier circuit , the frequency discrimination and agc circuit
在分析原系统结构和理论的基础上,完成了整个无线数字音频传输模块各单元电路的设计。主要包括有数字音频编码和解码电路及外围电路的设计、基于锁相频率合成器理论的fsk电路设计、功率放大器的设计、鉴频与agc控制电路的设计。 - In the part , there are following contents : single - chip and memory circuit , interrupt control circuit , decoding circuit , parameter area circuit , watchdog circuit and serial communication interface circuit , etc . in this paper , serial communication interfaces between upper pc and lower single - chips are designed
其中，微处理器的设计是关键。在微处理器部分的设计中，主要包括以下内容：单片机及存储器电路设计、译码器电路设计、参数区电路设计、中断控制电路设计、看门狗电路设计、串行通信接口电路设计等。
